Table of Contents

FPGA Programming

This camera features a user programmable FPGA to allow high speed real time image processing. Programming can be done by hand via VHDL or by using Visual Applets as third party tool. In either way, creating a FPGA design means to combine user specific FPGA design code with a predefined camera realated IP core needet to operate the camera.

General

The FPGA is a central building block, which connects the image sensor to the CPU. The FPGA has access to a dedicated image SDRAM to support the implementation of low-level image processing tasks (e.g. convolution, morphological operations and segmentation). The FPGA is also responsible for accessing digital I/O, status LED and temperature sensor.

The FPGA device used is the XILINX Spartan3 XC3S1000 which provides enough resources for image pre-processing applications. Depending on the configuration of the camera approximately 10-15% of the total FPGA logic resources are used for necessary system tasks, making 85-90% of the FPGA available for user specific logic designs.

FESTO SBOx Core

That part of the FPGA which is absolutely necessary for a proper operation of the camera is integrated in the FESTO SBOx Core and provided as a net list. This core covers all interfaces of the FPGA to external components, with the exception of the SDRAM. This means that all pins of the FPGA are driven or processed accordingly by the core.

The programming interface for user-specific designs is located entirely in the interior of the FPGA (exception: SDRAM). This facilitates integration into the complete camera system considerably (it is not necessary to consider timings for external components such as the processor).

FESTO SBOx-Core

The entity description of the FESTO SBOx Core therefore comprises on the one hand the interfaces to the user-specific FPGA design and, on the other hand, all interfaces to the external components (processor, image sensor etc.).

Design Flow

Basically, there are two possibilities for FPGA programming. They have in common, that at the end of the FPGA design process you will have a bit file containing the new FPGA design.

VHDL Programming

The first possibility is to take the FESTO SBOx core, download Xilinx WebPack FPGA programming tool and program your own VHDL modules that interface to the FESTO SBOx core, i.e. you populate the user specific FPGA application space with your own VHDL modules and link them with the surrounding FESTO SBOx core. This process is similar to software development where you write some C modules that are linked against a given library with a specific interface.

Customers can get a detailed specification of the FESTO SBOx core (including the necessary netlist and VHDL programming examples) from the distributor. Note, that at the moment the FESTO SBOx core is available only for the VGA and WVGA cameras. Other sensor types are supported on demand, please contact the distributor.

Visual Applets

Instead of doing VHDL module programming you have the possibility to use Silicon Software Visual Applets, which is a graphical design environment for high level FPGA programming.

Tools

To work with different FPGA designs you will need the following tools:

bin2fpga

Is a tool necessary to convert a .bin design file into a .fpga file. The difference is that an .fpga file has it's length stored in the first four bytes of the file. This is necessary for the camera's FPGA loading process. In addition to the file length an .fpga file also contains filename and date/time information when conversion to .fpga was made. This additional information is very useful to identify the currently active FPGA design of the camera. You can ask for this information by the command:

~ $ cat /proc/config/fpga
o83I.fpga/2007-10-13/13:45

The syntax for bin2fpga is the following:

user@host> bin2fpga [-o outfile] binfile

After conversion to .fpga the file may be downloaded to the camera by the following tools.

loadfpga

loadfpga is a tool available on the camera to online load a new .fpga design file into the camera's FPGA. The loading process takes approximately halve a second. During this time interrupts are off, i.e. network traffic is not possible.

~ $ loadfpga /tmp/o83I.fpga
online loading FPGA design file /tmp/o83I.fpga ...
~ $

loadfpga does an online loading only, i.e. when you switch off the camera the design stored in flash memory gets programmed again into the FPGA after reboot. This makes it convenient when FPGA designs are loaded that do not work correctly. In such cases you will just have to reboot to restore the original correct design.

backupfpga

backupfpga extracts the FPGA design which is loaded at boot-time from flash memory. Use this tool prior to progfpga if you want to backup your FPGA design.

~ $ backupfpga
Wrote /dev/mtd2 fpga-backup to o83I.fpga
~ $   

progfpga

progfpga works similar to loadfpga except that a .fpga design file gets programmed into flash memory (from where it gets loaded after reboot), not downloaded immediately to the camera's FPGA. Therefore, use progfpga only to store a FPGA design permanently (NOTE: use backupfpga to backup your FPGA design).

~ $ progfpga o83I.fpga
flashing o83I.fpga
Erasing 256 Kibyte @ 40000 -- 50 % complete.
~ $ 

Web Interface for FPGA Programming

To help FPGA programmers with downloading and testing their own FPGA designs the camera offers a web interface that can be reached via

These FPGA web interfaces are not linked with the camera's main web pages because they should be used only by FPGA programmers. They offer possibility to download FPGA designs and see resulting images via web browser without any camera related programming interactions. See the camera's FPGA programming package for further details on functionality.

FPGA Programming Examples

Examples how to implement FPGA designs in VHDL together with corresponding C/C++ applications are part of the FESTO SBOx core specification package.

For obtaining this package send an email to tec@festo.at. Please provide your camera's complete system information in your request. This information can be accessed through the Camera Info button on your camera's main web page.

This package can also be obtained from your distributor.