Technical Data

SBOC-C-R3B SBOC-C-R3C SBOC-C-R1B SBOC-C-R1C SBOI-C-R1B SBOI-C-R1C SBOC-C-R2B SBOC-C-R2C
Sensor resolution [pixels] 752×480 Wide VGA 640×480 VGA 1280×1024 SXGA
Optical sensor format
(needed for lens selection)
1/3-inch 1/2-inch 2/3-inch
Exposure time [ms] 0.112 … 2200 Micron MT9V022
0.018 … 2200 Micron MT9V023
20MHz: 0.116 … 2147
40MHz: 0.058 … 2147
50MHz: 0.047 … 1982
60MHz: 0.039 … 1651
0.008 … 53687
Gain 1 … 25 1 … 18 1 … 16
Frame rate (full image) [fps] 60 185 27
Frequency [MHz] 26.334 20 / 40 / 50 / 60 40
Lens mounting CS mount
C mount only with protective tubing OR spacer ring
built-in lens
(f = 12mm)
CS mount
C mount only with protective tubing OR spacer ring
Sensor type Monochrome Colour Monochrome Colour Monochrom Colour Monochrome Colour
Operating distance [mm] Dependent on the lens selected 22 … 1000 Dependent on the lens selected
Field of vision [mm] Dependent on the lens selected 14×10 … 520×390 Dependent on the lens selected
CAN connector - - x x x x x x
Current consumption with load−free outputs [mA] 120
Power consumption with load−free outputs [W] 1.9
Maximum total current [A] 1.5 on the 24 V outputs
Rated operating voltage [V DC] 24
Permitted fluctuations in voltage [%] ±10
Fuse protection for supply voltage [A] external fuse protection; 2 (micro fuse, quick−acting)
Protection class as per EN 60529 with protective tubing: IP65 and IP67 IP65 and IP67 with protective tubing: IP65 and IP67
Ambient temperature -10 … +50 °C
Geometry
- Width [mm]
- Height [mm]
- Length [mm]

45
45
139.4 (with protective tubing)

45
45
83.7

45
45
139.4 (with protective tubing)
Product weight [g] app. 174 app. 182 app. 184 app. 182

Camera Hardware Overview

Heart of the camera is a Marvell PXA255 low power application processor (Intel XScale core) running at 400MHz in conjunction with a Xilinx Spartan 3 FPGA. The CPU has 64MByte of SDRAM and 32MByte (new models already have 64MByte) of flash memory attached. To store non-volatile cyclic data with high update frequency (flash memory would not be appropriate) a 16kBit FRAM is accessible via a SPI port. See the following figure for a block diagram.

The FPGA plays a central role in the camera's embedded system as it is responsible for interfacing the image sensor and I/O. A 32MByte SDRAM is attached to the FPGA to hold image data when using the FPGA for image processing purposes. Besides digital I/O and status LED a combined temperature sensor and unique ID chip is accessible via FPGA. An important feature of the FPGA is the high speed JPEG codec that can do real time JPEG compression of acquired image streams.

The FPGA can be programmed by the user for dedicated image processing tasks. Of course a fully featured FPGA design is delivered with the camera.

I/O interfaces comprise 10/100MBit Ethernet, CAN bus and digital I/O. CAN offers the possibility for direct communication to a variety of peripherals, like additional I/O, PLCs, motion controller, etc.

Here is the block diagram of the camera hardware:

The following table lists additional information about camera hardware components:

CPU Marvell PXA255 (Intel XSacle core), 400 MHz
(ARM 5TE instruction set, 32 bit fixed point)
FPGA Xilinx Spartan 3 (XC3S1000)
Memory 64 MByte SDRAM at CPU,
32 MByte SDRAM at FPGA
32 MByte Flash (new models have 64 MByte)
16 kBit FRAM
Image sensor Micron MT9V403: high speed CMOS VGA sensor, 60MHz, global shutter
Cypress Ibis5-B-1300: CMOS 1.3 MPixel, 40MHz, global shutter
Micron MT9V02x: CMOS Wide VGA (752×480), 27MHz, global shutter
Network 10/100MBit Ethernet interface
CAN Stand alone CAN controller Microchip MCP2515, transceiver galvanically decoupled