VisualAppletsĀ® is a hardware programming tool for FPGAs, based on the use of graphical pipeline-structure objects by Silicon Software.
Image processing designs are arranged by the combination of operator modules, filter modules and transport links.
The provided libraries contain more than 200 hardware based operators that cover standard as well as advanced image processing functions.
Visual Applets automatically generates FPGA designs ready to load on the camera. No VHDL programming knowledge is necessary.
Here is a Visual Applets example for a two dimensional sobel edge detection filter. Image data is read from the image sensor and split into branches to detect horizontal and vertical edges independently. The outputs of these branches are added and scaled to improve visualisation.
To support easy downloading of Visual Applet designs, the camera offers a dedicated web interface available at http://<ip-address-of-camera>/va/.
Normally, the output of Visual Applet designs is directly used by application code instead of using a web interface for viewing. See the Visual Applets programming example for information concerning this.